Set the MODULE_LICENSE as "GPL" according to commit bf7fbeeae6db. Synchronized the clock tree with the latest changes from Emil. JH7110_AONCLK_APB_BUS_FUNC to JH7110_AONCLK_APB_BUS. Changed the macro JH7110_AONCLK_RTC to JH7110_AONCLK_RTC_OSC and Selected RESET_STARFIVE_JH7110 in Kconfig option CLK_STARFIVE_JH7110_SYS. Deleted the extra 1-1 clocks and synchronized the clock tree with the Removed the flags of trace/debug clocks and set the flags of core clocks Changed the clock-name "clk_rtc" to "rtc_osc" and "apb_bus_func" to Include/dt-bindings/reset/starfive,jh7110-crg.h. Renamed include/dt-bindings/reset/starfive-jh7110.h to Split patch 8 into sys part and aon part. Synchronized the definitions with the latest changes from Emil. Include/dt-bindings/clock/starfive,jh7110-crg.h. Renamed include/dt-bindings/clock/starfive-jh7110.h to Split patch 7 into sys part and aon part. Passed the "owner" member of reset_controller_dev structureĭirectly in reset_starfive_jh7100_register(). Improved the coding style of patch 11, 12 and 13. Removed Co-developed-by tag of Emil in patch 2 and patch 5. Changed the commit author from Hal to Emil in patch 2 and patch 5. Removed Co-developed-by tag of Hal in patch 1 and patch 4. Added "JH71X0" to the StarFive driver headers in MAINTAINERS. You can simply get or review the patches at the link. This patch series adds basic clock&reset support for StarFive JH7110 SoC. Stephen Boyd, Michael Turquette, Philipp Zabel,Įmil Renner Berthing, Hal Feng, linux-kernel ` (10 more replies) 0 siblings, 11 replies 60+ messages in threadĬc: Conor Dooley, Palmer Dabbelt, Rob Herring, Krzysztof Kozlowski, 0:50 ` clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng Basic clock and reset support for StarFive JH7110 RISC-V SoC archive mirror help / color / mirror / Atom feed * Basic clock and reset support for StarFive JH7110 RISC-V SoC 0:50 Hal Feng
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